The present invention relates to a semiconductor device having high speed and high-power output, and a method for fabricating the same.
In the field of mobile communication systems, used frequencies thereof have recently increased to around 2 GHz, and electronic devices having high speeds and high-power outputs constituting such systems are required. In the technical field of semiconductor devices, various studies are made for higher voltage resistances of field effect transistors.
The field effect transistor conventionally includes the channel region of Si or GaAs.
The field effect transistor including the channel region of Si is exemplified by a metal-oxide-semiconductor field effect transistor (MOSFET) formed on an Si substrate. The MOSFET including the channel region of Si, which is an indirect transition-type semiconductor, does not have Gunn oscillation even at high operational voltages. Accordingly the gate electrode and the drain electrode are allowed to be spaced from each other by a large gap, whereby high operational voltages can be easily obtained. However, because of Si, whose carrier mobility is low, it is difficult to use the MOS field effect transistor in the above-described application requiring high speed operation.
The field effect transistor including the channel region of GaAs is exemplified by a metal-semiconductor field effect transistor (MESFET) formed on a GaAs substrate. Because of GaAs, which has a higher carrier mobility than Si, the field effect transistor including the channel region of GaAs is more suitable for high speed operation, but because of GaAs, which is a direct transition-type semiconductor and has a low .GAMMA.-L energy difference as low as about 0.2 eV, often fails to normally operate because of Gunn oscillation due to operational voltage increase. This inconvenience must be removed by gate width increase for higher power output. However, this leads to chip area increase and cost increase, and is limited in terms of handling. Presently, in consideration of suppressing the Gunn oscillation, 10 V operation is a limit, and an about 1.times.3 mm chip size is a limit in consideration of handling. In consideration of output, an about 30-40 W is a limit.
Recently pseudo morphic structure, which includes an InGaAs film of an In composition which does not permit dislocations formed on a GaAs substrate, sandwiched by GaAs is locally practiced. The pseudo morphic structure, whose .GAMMA.-L energy difference is larger than GaAs, can enhance the effect of suppressing the Gunn oscillations. However, in the pseudo morphic structure, whose band gap is smaller, impact ionization tends to take place in the channel region, and holes are accumulated. As a result, a kink often takes place in the I-V characteristics. Thus, the pseudo morphic structure cannot either attain higher power outputs by high voltage operation.
As described above, the conventional field effect transistor has found it difficult to provide high-power outputs by high voltage operation.